Adelaide Research & Scholarship
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https://hdl.handle.net/2440/28365
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| Type: | Conference paper |
| Title: | A technique for implementing arbitrary Boolean functions in threshold logic |
| Author: | Celinski, P. Sherman, G. Abbott, D. |
| Citation: | Smart electronics and MEMS II : 13-15 December 2000, Melbourne, Australia / Derek Abbott, Vijay K. Varadan, Karl F. Boehringer, chairs/editors ; sponsored by SPIE--the International Society for Optical Engineering, DSTO--Defence Science and Technology Organisation, Department of Defence, Australia, Victorian Department of State and Regional Development, State Government of Victoria, Australia ; cooperating organization: Swinburne University of Technology (Australia), pp. 339-350 |
| Publisher: | THE SOCIETY OF PHOTO-OPTICAL INSTRUMENTATION ENGINEERS |
| Publisher Place: | PO BOX 10 BELLINGHAM WASHINGTON USA |
| Issue Date: | 2001 |
| Series/Report no.: | Proceedings of SPIE--the International Society for Optical Engineering ; 4236 |
| ISBN: | 081943910x |
| ISSN: | 0277-786X |
| Conference Name: | Smart Electronics and MEMS II (2000 : Melbourne, Australia) |
| Editor: | Abbott, D. Varadan, V.K. Boehringer, K.F. |
| Statement of Responsibility: | Peter Celinski, Gregory D. Sherman, and Derek Abbott |
| Abstract: | The main result of this paper is the development of a systematic paper-and-pencil design methodology for implementing Boolean functions of up to 4 variables using threshold logic (TL) gates, which does not require linear programming, for the first time. The method is similar in operation to the Karnaugh map logic minimization technique, and is based on determining the minimum threshold cover of a Boolean function. The paper also reviews aspects of TL and discusses aspects of the proposed design methodology when combined with the implementation issues present in neuron-MOS based TL gates. Two circuit design examples using the proposed technique are given. |
| Description: | © 2001 COPYRIGHT SPIE--The International Society for Optical Engineering |
| DOI: | 10.1117/12.418772 |
| Published version: | http://dx.doi.org/10.1117/12.418772 |
| Appears in Collections: | Aurora harvest 6 Electrical and Electronic Engineering publications |
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