Please use this identifier to cite or link to this item: https://hdl.handle.net/2440/122348
Type: Thesis
Title: Low-power low-phase noise LC oscillators in silicon-on-sapphire CMOS technology
Author: Kong, Wan-Chul
Issue Date: 2004
School/Discipline: School of Electrical and Electronic Engineering
Abstract: Recent research to accommodate increasing customers' demand is focusing on low power wireless applications with a small form factor in such areas as WLAN transceivers, GPS transceivers and digital mobile phones. In particular, such a trend leads to operating frequencies over 2 GHz in the WLAN products to provide a high speed-transferring data. Recently, much effort on improving the performance of radio-frequency (RF) front-ends has been conducted in CMOS device technology for low power and low cost. However, RF components such as voltage-controlled oscillators (VCOs)' power amplifiers, low noise amplifiers and mixers suffer from the drawbacks of the CMOS technology in terms of noise and poor quality (Q) factor of passive devices. In addition, Iow phase noise performance of the VCOs is highly desired to effectually exploit limited frequency resources. In this thesis, a research on VCOs of low power and low phase noise is conducted in silicon-on-sapphire CMOS process. A single and a quadrature 5.8 GHz VCO are designed for targeting the intellectual property core of a WLAN front-end radio-on-chip operating in direct conversion mode. Each VCO consists of a negative G* oscillator with an N/PMOS cross-coupled pair and an optimised LC tank. Symmetric inductors are modelled and designed in 2.5D electromagnetic field environment to obtain an optimum Q factor. Inversion-mode PNIOS varactors are co-simulated to estimate LC tank tuning frequency and Q factor with ,S-parameter simulation results of the symmetric inductors. The bias current source in the oscillator is replaced by a noise filtering inductor and MiM capacitor to prevent the upconversion of its flicker noise and fllter second-orcler harmonics. The single VCO exhibits a phase noise of -119.35 dbc/Hz at 3 MHz offset frequency from 0.8 V power supply voltage. It draws 0.52 mA over a tuning frequency of 736 NIHz (I2.7%). A low power consumption of around 0.42 mW is achievecl and a figure of merit of -1Bg dB is recorded; this figure of merit is the second highest among the published literatures related to RF VCOs. The quadrature VCO, consisted of two identical single LC VCOs, consumes 1.86 mW from 0.9 V supply voltage with a phase noise of -115.7 dB/Hz at 3 MHz offset. Its tuning range reaches up to 301 MHz (5.2 %). Practical issues for the design and electromagnetic simulation of the LC VCOs are discussed and several recommendations for improving the performance of quadrature VCOs are presented.
Advisor: Al-Sarawi, Said F
Lim, Cheng-Chew
Dissertation Note: Thesis (MESc) -- University of Adelaide, School of Electrical and Electronic Engineering, 2004
Provenance: This electronic version is made publicly available by the University of Adelaide in accordance with its open access policy for student theses. Copyright in this thesis remains with the author. This thesis may incorporate third party material which has been used by the author pursuant to Fair Dealing exceptions. If you are the owner of any included third party copyright material you wish to be removed from this electronic version, please complete the take down form located at: http://www.adelaide.edu.au/legals
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